Development of evolutionary algorithms for intelligent real-time control systems using field-programmable technology
Ανάπτυξη εξελικτικών αλγορίθμων για ευφυή συστήματα πραγματικού χρόνου με χρήση προγραμματιζόμενης τεχνολογίας πεδίου

View/ Open
Keywords
Big Bang-Big Crunch (BB-BC) algorithm ; Evolutionary algorithms ; Field Program-mable Gate Array (FPGA) ; Hardware Description Language (HDL) ; PID controller ; Fractional Order PID (FOPID) controller ; Learning Algorithm Multivariate Data Analysis (LAMDA) ; Big Bang-Big Crunch (BB-BC) αλγόριθμος ; Εξελικτικοί αλγόριθμοι ; Προγραμματιζόμενες στο Πεδίο Συστοιχίες Πυλών (FPGAs) ; Γλώσσα περιγραφής υλικού ; Ελεγκτής PID ; Ελεγκτής PID Κλασματικής Τάξης (FOPID) ; Αλγόριθμος Μάθησης Πολυμεταβλητής Ανάλυσης Δεδομένων (LAMDA)Abstract
Ensuring optimal performance of control units, such as
Proportional–Integral–Derivative (PID) controllers, is essential for maintaining
efficiency, stability, and fast response time in industrial automation systems, such
as Heating, Ventilation, and Air Conditioning (HVAC) systems. However, conventional
controllers often struggle with the complex, non-linear dy-namics and disturbances
present in real-time industrial applications. These challenges have created a
growing need for advanced, robust, and adaptive optimization techniques. This PhD
thesis focuses on a robust optimization algorithm, the Big Bang Big Crunch (BB-BC),
as a fast, reliable solution for auto-tuning control parameters in practical
applications.
Motivated by the increasing demand for high-speed, energy-efficient, and real-time
control in industrial systems, this work explores hardware-accelerated
implementations of optimi-zation algorithms, focusing on Field-Programmable Gate
Arrays (FPGAs). Although the BB-BC algorithm is well-suited for real-time
applications due to its rapid convergence and low computational complexity,
software-based implementations running on conventional pro-cessors often fail to
meet strict timing constraints. To overcome this limitation, the thesis proposes a
novel FPGA-based architecture for the BB-BC algorithm. Field programmable technology
offers a realistic solution to improve response time and save power consumption, and
presents an efficient way to implement complex algorithms, improving real-time
re-sponse in control systems. In other words, the field programmable technology
provides a flexible and parallel computing environment for executing optimization
algorithms in real-time industrial applications. In this thesis, we show that the
BB-BC algorithm is well-suited for FPGA-based acceleration; we propose hardware
performance mechanisms that over-come the design limitations observed in classical
genetic evolutionary algorithms, which of-ten hinder the performance of their
hardware-based accelerators and exhibit limitations, particularly in terms of
scalability and response time. We present an FPGA-based accelerator for the BB-BC
algorithm, which incorporates a fully pipelined design of both BB-BC phases, Big
Bang Phase (BBP), and Big Crunch Phase (BCP). A robust methodological framework for
this FPGA-based accelerator has been developed and validated on a typical
optimization problem using standard mathematical benchmarks. The experimental
results demonstrate significant speedup over software counterparts.
Despite the growing interest in robust, real-time optimization for industrial
control systems typically characterized by disturbances, nonlinearities, and time
delays, existing literature offers few solutions that combine fast-convergent
algorithms with hardware acceleration. This thesis addresses this gap by studying
the integration of BB-BC into multiple control strategies, including PID,
Fractional-Order PID (FOPID), and the Learning Algorithm for Mul-tivariate Data
Analysis (LAMDA), and by evaluating their FPGA-based implementations.
In particular, the thesis examines the use of BB-BC to tune PID and FOPID
controllers, fol-lowed by hardware deployment on FPGA platforms. The approach is
validated on an HVAC system, using various modeling strategies such as Second-Order
Plus Time Delay (SOPTD) models. Additionally, BB-BC-powered PID, FOPID, and LAMDA
controllers are designed and analyzed for robustness under different disturbance
profiles, enabling comparative evalua-tion across diverse industrial scenarios.
MATLAB/Simulink simulations of the combined op-timization–control framework further
highlight the superior timing behavior, scalability, and energy efficiency of the
FPGA-accelerated BB-BC solutions compared to traditional tech-niques. The key
objectives of this PhD thesis are to:
▪Develop a novel FPGA-based implementation of the BB-BC optimization algorithm and
demonstrate its performance through representative case studies.
▪Integrate the BB-BC algorithm into PID and FOPID controllers for parameter
optimiza-tion, and validate the proposed approach on HVAC systems.
▪Extend the BB-BC optimization approach to LAMDA controllers to explore its
applica-bility in more complex industrial environments.
▪Enhance real-time performance and energy efficiency through hardware-accelerated
optimization using FPGA technology.


