Implementation and evaluation of side-channel attack countermeasures for FPGAs
Υλοποίηση και αξιολόγηση αντιμέτρων επιθέσεων πλευρικού καναλιού για FPGAs
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Keywords
Side-channel attacks ; FPGA security ; AES ; Noise generators ; Side-channel attack countermeasures ; Correlation Power Analysis (CPA) ; Επιθέσεις πλευρικού καναλιού ; Ασφάλεια FPGA ; Γεννήτριες θορύβου ; Αντίμετρα επιθέσεων πλευρικού καναλιού ; Ανάλυση ισχύος συσχέτισηςAbstract
To this day, side-channel attacks are a well-known critical threat to cryptographic implementations on FPGAs, exploiting various physical effects such as power consumption and routing activity, which are often responsible for unintentionally leaking sensitive information of cryptographic operations. Therefore, a practical and tool-oriented methodology is proposed in the present thesis, which aims to enhance the side-channel resistance of an AES design implemented on a Xilinx Artix-7 FPGA. Firstly, an AES core implementation is floor planned inside a dedicated area on the FPGA board to contain its routing, thus creating a stable baseline AES implementation, which will pose as a reference for building structured noise generators. All noise generators and their variants are constructed from Look-Up Table (LUT) primitives, utilized as Shift Register LUTs (SRLs) and are inserted into pre-allocated available regions in between AES operations using RapidWright. In total, four different spatial placement patterns, each with three arbitrary noise variants have been produced, amounting to twelve individual noise generators. Subsequently, each implementation is programmed on a CW312-A35 board, where thousands of power traces are captured using a ChipWhisperer Husky for the purpose of a series of side-channel attacks. Eventually, Correlation Power Analysis (CPA) further demonstrates that structured placement of noise increases the number of traces required for a successful key recovery, thus proving their effective use as hiding countermeasures, that fit seamlessly in any existing FPGA design and improving hardware security in real-world applications.
Postgraduate Studies Programme
Κυβερνοασφάλεια και Επιστήμη ΔεδομένωνDepartment
Σχολή Τεχνολογιών Πληροφορικής και Επικοινωνιών. Τμήμα ΠληροφορικήςNumber of pages
47Language
EnglishCollections
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Αναφορά Δημιουργού-Μη Εμπορική Χρήση-Όχι Παράγωγα Έργα 3.0 Ελλάδα
Αναφορά Δημιουργού-Μη Εμπορική Χρήση-Όχι Παράγωγα Έργα 3.0 Ελλάδα