Evaluating fault attack vulnerabilities in lightweight cryptographic HLS implementations
Αξιολόγηση ευπαθειών επιθέσεων σφαλμάτων σε ελαφροβαρείς κρυπτογραφικούς αλγορίθμους σχεδιασμένους για HLS
Master Thesis
Author
Kollias, Theodoros
Κόλλιας, Θεόδωρος
Date
2024-11Advisor
Psarakis, MichaelΨαράκης, Μιχαήλ
View/ Open
Keywords
Hardware security ; High-level Synthesis (HLS) ; Fault injection attack ; Lightweight cryptographyAbstract
Today’s exponential demand for lightweight applications requires the reduction of time-to-market while maintaining high security standards in hardware-oriented applications, particularly within embedded systems. High-Level Synthesis (HLS) tools have emerged as essential enablers in this process, allowing developers and designers to utilize High-Level Languages (HLL) alongside optimization strategies to produce Hardware Description Language (HDL) code. This approach accelerates hardware development, facilitates early verification and validation. Ultimately, it contributes to a more efficient design flow. However, the security implications of HLS-generated designs, especially their vulnerability to fault attacks, remain under-explored. This thesis delves into the fault attack vulnerabilities of four(4) prominent lightweight cryptographic algorithms ("GIFT-64-128", "LED-64", "KATAN32" & "SIMON64/128") implemented through the HLS workflow. Through a series of statistical fault injection experiments, we evaluate the robustness of these algorithms. The findings provide insights into the trade-offs between design efficiency and security in HLS-generated cryptographic hardware. Although HLS tools can boost the design process, consideration of synthesis configurations is essential to mitigate vulnerabilities and ensure robust protection against hardware-based attacks.