PTLsim x86 architectural simulator : extending the data and instruction prefetching subsystem
Primary goal of existing x86 architectural simulation tools is to provide a working model that accurately resembles most of the mainstream implementation techniques. Lower priority is given to performance units, which in contrast, greatly interest the industry. We expanded PTLsim architectural simulator by integrating two hardware prefetcher components for data and instructions, respectively, and by adding more detail in two critical performance-related parts of the microprocessor, the cache hierarchy and branch prediction unit. All our modifications resemble commercial microprocessor implementations and the performance measurement results correspond to the design estimates. Our expanded PTLSim version with the integrated prefetching sub-system can achieve a total of 4-5% performance boost compared to the initial design.