Δοκιμή ολοκληρωμένων κυκλωμάτων με χρήση του Inovys Personal Ocelot και του προτύπου IEEE Std. 1450 STIL (Standard Test Interface Language)
Testing integrated circuits on Inovys Personal Ocelot with the use of IEEE Std. 1450 STIL (Standard Test Interface Language)
Γκλιάτης, Ευστράτιος Π.
SubjectΟλοκληρωμένα κυκλώματα ; Integrated circuits -- Testing -- Computer simulation -- Standards ; Integrated circuits -- Testing
The purpose of this paper is to study IEEE Std. 1450 STIL, explore the capabilities of a hardware tester such as INOVYS PERSONAL OCELOT, and create an operation guide for the tester. Personal Ocelot tester gives us the ability to verify the correct operation of a new hardware integrated circuit design before it enters the production stage. The complete verification includes: (a) the description of the expected behavior of the device under test (DUT), (b) the description of the tests to be executed (test vectors), (c) the physical connection of the integrated circuit to the tester and (d) the execution of the tests and the collection of the results. To describe the expected output of the integrated circuit and the input test vectors the user takes advantage of IEEE Std. 1450 STIL (standard test interface language, consciously mispronounced "style" by the working group). STIL is a standard that was created by the main ATE vendors (automatic test equipment) and EDA tool providers (electronic device automation) to simplify their production procedure. The scope of this paper was the in depth study of the operational capabilities of the hardware tester INOVYS PERSONAL OCELOT, provided by the Embedded Computing Systems Laboratory of the University of Piraeus, and the IEEE Std. 1450 STIL. The test of two (2) small scale integrated circuits was executed, an adder and a multiplier of 3-bit. For the implementation of the two circuits, the use of FPGA Xilinx Spartan 3E board was needed to perform actual test. To connect the hardware tester with the implemented circuits under test there was a PCB (printed circuit board) designed and used, that provided a pin header for the Input and Output pins of the hardware tester.